With large and complex semiconductor designs including hundreds of millions of transistors common in modern applications, the importance of accurately designing, debugging, and fabricating such large, complex designs becomes paramount. A wide variety of electronic computer-aided design tools have been deployed to aid in the process. Examples of some of the tools that have been used include schematic capture tools, hardware synthesis tools, formal verification tools, physical layout tools, and various simulation tools.
Simulation can occur at various conceptual levels for the semiconductor design. In some cases, a functional simulation is performed based on a functional description of the design. A digital simulation of the gate-level functionality can also be performed. The digital simulation can include timing analysis either during an initial or subsequent pass through a simulation process. In some cases, a full analog simulation can be performed, with this analog simulation typically only performed on a few key nets, such as clock lines, memory sense amplifiers, etc. In some cases, analog simulation can, however, be performed on a full design.
The results of the various simulations are used to determine if the design is working as intended. This process can be referred to as debugging the design. Various test vectors are developed to use in testing a manufactured integrated circuit (IC) fabricated from the design.
Diagnosing test failures of manufactured integrated circuits can help to increase yield enhancement and/or ramp up a new process. Simulation is helpful in diagnosing the test failures that occur, as probing actual failing parts to determine the cause of the failure may be difficult. However, diagnosis of large designs using simulation can require significant CPU time and very large memory usage, thus becoming very costly. Similarly, debugging simulation failures of large designs can also require significant CPU time and very large memory usage.